1. Field
An example embodiments provides a semiconductor memory device and a method of manufacturing the same, and more particularly, to a nonvolatile memory device and a method of manufacturing the same.
2. Description of the Related Art
Nonvolatile memory devices can maintain stored data while external power is turned off. Such nonvolatile memory devices include a mask read only memory (mask ROM) device, an erasable programmable read-only memory (EPROM) device, an electrically erasable programmable read-only memory (EEPROM) device, and a flash memory device. The flash memory device is classified into a NOR-type flash memory device and a NAND-type flash memory device.
FIG. 1 is a plan view of a conventional EEPROM device. FIGS. 2 and 3 are cross-sectional views taken along lines II-II′ and of FIG. 1, respectively. Referring to FIGS. 1 through 3, the EEPROM device includes an active region 12 defined by a device isolation layer 13 of a semiconductor substrate 11. The active region 12 includes a source region 12s, a drain region 12d, and a floating diffusion region 12f. A sense line structure SL crosses the active region 12. A word line structure WL. spaced apart from and parallel to the sense line structure SL crosses the active region 12.
An interlayer dielectric 30, covering the word line structure WL and the sense line structure SL, is disposed on the semiconductor substrate 11. A bit line contact plug 31 connected to the drain region 12d is disposed in the interlayer dielectric 30. A bit line 35 connected to the bit line contact plug 31 is disposed on the interlayer dielectric 30. The word line structure WL includes a gate insulation layer 14, a first gate electrode 22, an inter-gate dielectric 24, and a second gate electrode 26. The sense line structure SL includes a tunnel insulation layer 15, a floating gate electrode 21, an inter-gate dielectric 23, and a control gate electrode 25. The sense line structure SL is disposed on the active region 12 between the drain region 12d and the floating diffusion region 12f. The word line structure WL is disposed on the active region 12 between the source region 12s and the floating diffusion region 12f. 
Since semiconductor devices are highly integrated, the channel width of a transistor including a word line structure WL may be reduced. As a result, a cell current may also be reduced, and a sense amplifier sensing an ON/OFF-state of a memory cell may be overloaded. Additionally, a low power voltage caused by the decreased cell current may reduce an operating speed of the semiconductor device.